Runtime Design Automation

Runtime Design Automation was founded in May 1995 to develop and market advanced design flow management tools for the Electronic Design Automation (EDA) and software development markets. Runtime's VOV design flow manager transparently captures, and controls, the complexities of electronic design flows. It helps design teams maintain consistency and correctness throughout multiple iterations of the design cycle despite the thousands of files generated during the design of complex systems. As a result, VOV offers design engineers and managers:

Reduced design risk

Increased engineering productivity

Efficient use of hardware and software

Re-use of existing design methodologies

VOV manages design dependencies transparently, without modifying file structures, EDA and software development tools, or design style.

The VOV design manager has been tested with a variety of EDA tools, including those from UC-Berkeley, Cadence, Siemens, Exemplar, Synopsys, Xilinx, Speed, Viewlogic, and interHDL. VOV can also be applied to the software development process.

The innovative technology behind the VOV design flow manager comprises run-time tracing for design management. This technology was initially developed at the University of California at Berkeley between 1989 and 1991 by Runtime founder Andrea Casotto. The technology was extended and tested at Siemens over the past several years.

Runtime Design Automation
P.O. Box 447
Alameda, CA 94501
(510) 521-6161 voice
(510) 521-6162 fax
rtda@rtda.com
http://www.rtda.com

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